I am working on an OpenRISC GCC port rewrite, here’s why.
For the past few years I have been working as a contributor to the OpenRISC CPU project. My work has mainly been focused on developing interest in the project by keeping the toolchains and software maintained and pushing outstanding patches upstream.
I have made way getting Linux SMP support, the GDB port, QEMU fixes and other patches written, reviewed and committed to the upstream repositories.
However there is one project that has been an issue from the beginning; GCC. OpenRISC has a mature GCC port started in early 2000s. The issue is it is not upstream due to one early contributor not having signed over his copyright. I decided to start with the rewrite. To do this I will:
- Write a SMH dummy architecture port following the ggx porting guide (moxie) guide.
- Use that basic knowledge to start on the or1k port.
If you are interested please reach out on IRC or E-mail.
Updates
See my articles on the progress of the project.
- OpenRISC GCC Status Update - Announcement on Hello World working
- GCC Important Passes - My guide to understanding the passes
- GCC Stack Frame - My guide to understanding the stack frame
Further Reading
- Writing a GCC back end - Krister Walfridsson’s excellent new series
- GCC Internals - The GNU reference manual
- Using GCC - The GCC user manual, some parts are for the backend
- Constraints for asm - Constraints sub section
- Spec files - Details on the spec
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language used by the GCC driver