Lately I have been working on some projects using verilog. My main development environment has been Altera Quartus II which works fine. However, when compiling in quartus we don’t always need to go through all of the sythesis and timing steps, instead one may just need to verify their source code is compilable.
vlog compiler included with ModelSim
can be used to quickly compile your HDL.
You can find more details on using ModelSim’s command line utilties at the ncsu modelsim tutorial.